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STELLAROrbital computing
STELLAR / technology

The systems architecture behind orbital data centers

Orbital data centers are not servers in space. They are spacecraft, compute payloads, thermal systems, storage systems, communications networks, and operations software engineered as one infrastructure service.
Spacecraft bus
Layer 1
Payload compute
Layer 2
Data assurance
Layer 3
Ground + cloud
Layer 4
Architecture/ visual
STELLAR systems architecture blueprint
Spacecraft + payload + ground + cloud
01 / technology map

Four systems that must work as one

Every STELLAR page has a visual reason to exist. The technology section separates compute, storage, thermal-power, and ground-cloud integration so each engineering discipline is understandable without turning the whole website into a document.

Radiation-aware workload execution

Orbital Compute

STELLAR compute nodes are designed for AI inference, autonomy workloads, data reduction, and high-value processing near orbital data sources.

Integrity, persistence, and delivery proof

Orbital Storage

Orbital storage gives missions a place to persist data, rank products, survive contact gaps, and deliver verified outputs to customers.

The physics of orbital data centers

Thermal & Power

Compute in orbit only works when power generation, heat rejection, radiator area, duty cycles, and safe modes are designed as one system.

Making orbital capacity usable

Ground + Cloud Integration

STELLAR connects orbital nodes to customer workflows through tasking, mission operations, ground stations, cloud handoff, and delivery verification.

02 / example system

Orbital compute is controlled by mission constraints

The website should show the technology like a product, not bury it in review language. Each system page uses a focused diagram and clear customer-facing explanation.

Engineering grid of STELLAR systems architecture
Compute / storage / thermal / ground single architecture
Orbital compute · Node-1 payload ICD · Sheet 1 of 1
STELLAR / TECHNOLOGY / COMPUTE · ICD-001 · REV. A · DRAFT

Orbital Compute payload — block schematic

Node-1 baseline · 500 km SSO · 95 kg allocation · pre-PDR

Drawing reference
STL-N1-PAY-ICD-001
SCALE 1:1 · SI · PRE-PDR
A1Host bus interface
  • J128 V regulated · 35 A
  • J2SpaceWire ×2 · 200 Mbps
  • J3CAN-FD · attitude / cmd
  • J4Thermistor harness ×8
  • J5TT&C bypass (S-band)
LINKARM
A2Power conditioning (PCDU)
28 V → [3V3 / 5V / 12V / 1V8]U2 · PCDU
EFUSE ×4 · LCL · hot-swap
  • P13.3 V · CPU + DDR · 6 A
  • P212 V · FPGA core · 18 A
A3Thermal control I/F
  • T1Cold plate Cu ×4
  • T2LHP loop ×2 (NH₃)
  • T3Deployable radiator (0.42 m²)
  • T4PT-1000 thermistor ×8
  • T5Heater string ×4 (28 V)
B1Compute payload — main board (Node-1 EQM)
Management CPUU10 · GR740
LEON4 ×4 · 250 MHz · ASIC
RTEMS · FDIR · ICD bridge · scheduler
4× SpW · 2× CAN · 64 MB EEPROM
FPGA inference fabricU11 · XQRVC1902
~26 TOPS · radiation-tolerant
Lane A · AI inf.
Lane B · auto ctrl
Lane C · DR
AXI-4 fabric · 1.6 GB/s
Working memory bankU20 · DDR4 ECC
16 GB · 1.6 GT/s · ECC
NVRAM scratchpadU21 · MRAM
64 MB · radiation-hard
Mission product storeU30 · MISSION SSD
2 TB RAID-1 · 128 GB priority queue · hash-chain integrity
Hot pool · DDR4 ECC
Persistent · RAID-1 SSD
Priority Q · NAND
FDIR enclosure · cross-channel watchdog
U40 — Supervisor & FDIR · dual-string · cross-checkpoint
EDAC · scrub @ 40 s · safe-mode latch · checkpoint store
OKWD
Payload I/O connectors (J5–J9)
J5
X-band TX
J6
Telemetry
J7
API ingress
J8
Cold-plate
J9
Spare
C1RF / downlink chain
HPA + diplexerU50 · X-band TX
100–500 Mbps · 6 W RF
Redundant TT&C pathU51 · S-band TT&C
2.5 kbps · cmd auth
TX-OK
C2Mission ops bridge
Pass schedulerU60 · Ops bridge
orbit-aware · priority Q
Hash-chain integrityU61 · Receipt gen
SHA-256 · replayable
C3Customer API gateway
  • K1POST /jobs · submit
  • K2GET /receipts
  • K3GET /events
  • K4POST /webhooks
  • K5GET /telemetry
  • K6GET /pass-schedule
  • K7OAuth2 / mTLS guard
  • K8Replay · audit log
APIID
Power bus · 28 V
Signal · SpW / AXI / API
RF feed · X-band
Thermal sense · PT-1000
Sheet 1 of 1 · Reference STL-N1-PAY-ICD-001 · ICD baseline pending preliminary design review (PDR).
Tolerances and pin counts shown to 1st-order accuracy. Final values are tracked against ADR-001 through ADR-005.
Sheet
1 of 1
Revision
A · DRAFT
Scale
1:1
Drawn
STELLAR PE
Date
2026-Q3
Status
PRE-PDR

Explore the Node-1 engineering preview

The visualizations lab keeps the deeper technical material available for reviewers without forcing every visitor into a technical-document experience.